1. Field of the Invention
The present invention relates generally to improvements related to reading a full-swing memory array, and, more particularly, to advantageous techniques for statically driving a global bit line in the full-swing memory array.
2. Relevant Background
Full-swing memory arrays utilize a dynamic precharge and discharge technique when reading bits stored in a memory cell. This conventional technique is typically divided into two levels to minimize diffusion capacitance carried on bit lines within a full-swing memory array. The first level of a full-swing memory array includes storage cells, pass transistors, and local bit lines. A storage cell stores a binary value. The pass transistor is driven by a read word line to discharge a local bit line based on a memory cell's content. The local bit line is typically shared by multiple read word lines. The local bit line is precharged high so that a transition on a memory read can be recognized. The local bit line provides input to the second level.
The second level of a full-swing memory array typically includes a number of inverters and pull-down transistor pairs where each pair is provided input by one local bit line. The pull-down transistors connect to a dynamically precharged global bit line. This memory array is termed full-swing because the local and global bit lines need to be pulled to ground in order to recognize a 0 value stored in a memory cell. When reading consecutive 0 values from a memory cell, a conventional lull-swing memory array requires pre-charging and discharging of the local and global bit lines. The pre-charging of the local and global bit lines must occur before a read word line signal is asserted. The discharging occurs as a 0 value is propagated through the second level. In this way, power is consumed by the pre-charging and discharging of both the local and global bit lines during a read when consecutive 0 values are propagated over the global bit line.
Furthermore, in conventional full-swing memory arrays, a holding circuit or dynamic-to-static converter is typically added to the output of the global bit line to ensure that the output holds the evaluated value of the global bit line. This additional circuitry consumes silicon real estate on which the memory array is disposed.